SNW 2018

June 17-18, 2018.
Honolulu, HI, USA

General Information


  • Nanometer-scale transistors, including those employing non-classical structures, novel channel and source/drain materials, or non-thermal injection mechanism
  • Junction and insulator materials and process technology for nanoelectronic devices
  • Techniques for fabrication of nanostructures, including nanometer scale patterning
  • Physics of nanoelectronic devices, e.g., quantum effects, non-equilibrium transport
  • Modeling and simulation of nanoelectronic devices, e.g. including atomistic effects
  • Nanoscale surface, interface, and heterojunction effects in devices
  • Device scaling issues including doping fluctuations and atomic granularity
  • Circuit design issues and novel circuit architectures, including quantum computing, for nanoelectronic devices
  • Optoelectronics using silicon nanostructures
  • Techniques targeting zero power electronics (self-supplying), including wireless sensors, energy harvesting, steep slope devices, ultra-low power design and devices
  • Devices for 3D and heterogeneous integration on Silicon, including Graphene, III-V devices, CNT, spin-based devices, MEMS and NEMS, etc.
  • Novel transistors based on two dimensional materials, e.g., MoS2, WS2, etc.
  • Novel non-volatile memories, e.g., MRAM, RRAM, PCM, etc.
  • Integrated energy harvesting and energy storage based on new material and structures
  • Reliability and Characterization for various nanoelectronic devices.
  • Environmental devices which contribute to low-carbon society (wireless sensors, energy harvesters, steep slope devices, etc.)


Hilton Hawaiian Village, Honolulu, HI USA

Copyright © 2018 SNW Organizing Committee
All Rights Reserved.